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TestTheStack.can

Browse source 
Added documentation
  Small improvements
This commit is contained in:
Jonny007-MKD 2014-08-31 19:43:57 +00:00
parent 83134f96a0
commit 77d5eb5137
1 changed files with 65 additions and 17 deletions
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82
Modbus-CAPL/include/CAPL/TestTheStack.can
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@ -1,4 +1,50 @@
/*@!Encoding:1252*/
// The state machine in this file will use all functions of the Modbus Client and check the results
// The states are:
//
// 0: Get device information [ -> OnModbusReadRegistersSuccess ]
// 5: Reading output bits (check functionality of 0x01) [ -> OnModbusReadBitsSuccess ]
// 10: Reading output registers (check functionality of 0x03) [ -> OnModbusReadRegistersSuccess ]
// 20: Reading input bits (check functionality of 0x02) [ -> OnModbusReadBitsSuccess ]
// 30: Reading input registers (check functionality of 0x04) [ -> OnModbusReadRegistersSuccess -> timr (30 or 130) ]
// 40: Write Bits 0x0 - 0x9 to 1 (check functionality of 0x0F) [ -> OnModbusWriteBitsSuccess ]
// 50: Write Bit 0x2 to 0 (check functionality of 0x05) [ -> OnModbusWriteBitSuccess -> timr ]
// 60: Read Bits 0x0 - 0x9 and check whether result is (check result of 0x0F and 0x05: 1 1 0 1 1 1 1 1 1) [ -> OnModbusReadBitsSuccess ]
// 70: Write 1 output registers 0x0 to 0x55555 (check functionality of 0x10) [ -> OnModbusWriteRegistersSuccess -> timr ]
// 75: Read output register 0x0 and check (check result of 0x10) [ -> OnModbusReadRegistersSuccess ]
// 80: Write output register 0x0 to 0x9999 (check functionality of 0x06) [ -> OnModbusWriteRegisterSuccess -> timr ]
// 90: Read output register 0x0 (check result of 0x06) [ -> OnModbusReadRegistersSuccess ]
// 100: Writing masks (&00F9 |0x006) to 0x0 (check functionality of 0x16) [ -> OnModbusWriteMasksSuccess -> timr ]
// 110: Read output register 0x0 and check the success of 100 (check result of 0x16) [ -> OnModbusReadRegistersSuccess ]
// 120: Read 3000 input bits (check whether read bit telegrams can be divided) [ -> OnModbusReadBitsSuccess ]
// 130: [ -> OnModbusReadBitsSuccess -> timr ]
// 140: Read 300 input registers (check whether read register telegrams can be divided) [ -> OnModbusReadRegistersSuccess ]
// 145: [ -> OnModbusReadRegistersSuccess ]
// 150: [ -> OnModbusReadRegistersSuccess -> timr (160 or 200) ]
// 160: Write 3000 Bits at 0x0 to 0 [ -> OnModbusWriteBitsSuccess ]
// 170: Write 3000 Bits at 0x0 to 0 [ -> OnModbusWriteBitsSuccess ]
// 180: Write 200 registers (check whether telegrams can be divided) [ -> OnModbusWriteRegistersSuccess ]
// 190: [ -> OnModbusWriteRegistersSuccess -> timr ]
// 900: Testing the receive window size [ -> OnModbusReadBitsSuccess -> 900 ]
// 900: Stop [ -> OnModbusReadBitsFailed ]
// Function codes (tested functionality, check results, checked whether telegrams can be divided)
// func result divided (B+R)
// 0x01 00 X (120) // Read Bits out
// 0x02 20 X 120 // Read Bits in
// 0x03 10 X (140) // Read Registers out
// 0x04 30 X 140 // Read Registers in
// 0x05 50 60 X // Write 1 Bit
// 0x06 80 90 X // Write 1 Register
// 0x0F 40 60 (160) // Write multiple Bits
// 0x0F* 160 |___| 160 // Write multiple Bits with encoding
// 0x10 70 75 180 // Write multiple Registers
// 0x16 100 110 X // Mask Register
// 0x17 |___| |___| |___| // Read/Write Registers
includes
{
#include "include/DeviceInformation.cin"
@ -11,7 +57,7 @@ variables
word state = 0;
byte s0i = 0;
struct device s0dev;
byte s20i = 1;
byte s90i = 1;
msTimer timr;
byte skipOutput = 1;
}
@ -87,7 +133,7 @@ void OnModbusReadBitsFailed(enum ModbusRequestError error, enum ModbusException
case 200:
if (error == FinalTimeout)
{
writeDbg(MbError, "State %d. Packet timed out! Receive window size: %d", state, s20i-1);
writeDbg(MbError, "State %d. Packet timed out! Receive window size: %d", state, s90i-1);
state = 210;
stop();
break;
@ -108,7 +154,7 @@ void OnModbusReadBitsSuccess(struct ModbusResReceiveBits mbres, byte bitStatus[]
switch (state)
{
case 0:
case 5:
writeDbg(MbDebug, "State %d. Successfully read %d output bit from 0x%04X", state, mbreq.Count, mbreq.Address);
ModbusReadOutRegisters(thisDev.Addr.Read.OutputRegisters, 1);
state = 10;
@ -140,14 +186,13 @@ void OnModbusReadBitsSuccess(struct ModbusResReceiveBits mbres, byte bitStatus[]
break;
case 130:
writeDbg(MbDebug, "State %d. Successfully received the Read-Bits telegrams (as expected)", state);
state = 140;
timr.Set(1);
break;
case 200:
case 900:
if (gQueueSent.Size() > 0 || gQueuePending.Size() > 0)
break;
++s20i;
for (i = 0; i < s20i && i < 100; i++)
++s90i;
for (i = 0; i < s90i && i < 100; i++)
ModbusReadBits(thisDev.Addr.Read.InputBits, 1);
break;
default:
@ -227,6 +272,7 @@ void OnModbusReadRegistersSuccess(struct ModbusResReceiveRegisters mbres, struct
//runError(1001, 0);
//return;
}
state = 5;
ModbusReadOutBits(thisDev.Addr.Read.OutputBits, 1);
}
break;
@ -238,9 +284,7 @@ void OnModbusReadRegistersSuccess(struct ModbusResReceiveRegisters mbres, struct
case 30:
writeDbg(MbDebug, "State %d. Successfully read %d input register from 0x%04X", state, mbreq.Count, mbreq.Address);
if (skipOutput)
state = 140;
else
state = 40;
state = 130;
timr.Set(1);
break;
case 75:
@ -288,7 +332,7 @@ void OnModbusReadRegistersSuccess(struct ModbusResReceiveRegisters mbres, struct
case 150:
writeDbg(MbDebug, "State %d. Successfully received three Read-Registers telegrams (as expected)", state);
if (skipOutput)
state = 200;
state = 900;
else
{
state = 160;
@ -580,7 +624,7 @@ void OnModbusWriteBitsSuccess(struct ModbusResConfirmMultiple mbres)
state = 170;
break;
case 170:
writeDbg(MbDebug, "State %d. Successfully received two Write-Bits telegrams (as expected)", state);
writeDbg(MbDebug, "State %d. Successfully received two(?) Write-Bits telegrams (as expected)", state);
ModbusWriteRegisters(thisDev.Addr.Write.OutputRegisters, 200, s17);
state = 180;
break;
@ -652,7 +696,6 @@ void OnModbusWriteRegistersSuccess(struct ModbusResConfirmMultiple mbres)
break;
case 190:
writeDbg(MbDebug, "State %d. Successfully received two Write-Registers telegrams (as expected)", state);
state = 200;
timr.Set(1);
break;
default:
@ -708,8 +751,9 @@ on timer timr
switch(state)
{
case 40:
case 30:
ModbusWriteBitsB(thisDev.Addr.Write.OutputBits, 10, s3);
state = 40;
break;
case 50:
ModbusReadOutBits(thisDev.Addr.Read.OutputBits, 10);
@ -727,16 +771,20 @@ on timer timr
ModbusReadOutRegisters(thisDev.Addr.Read.OutputRegisters, 1);
state = 110;
break;
case 140:
case 130:
ModbusReadRegisters(thisDev.Addr.Read.InputRegisters, 300);
state = 140;
break;
case 160:
case 170:
ModbusWriteBitsB(thisDev.Addr.Write.OutputBits, 3000, s15);
break;
case 200:
case 170:
ModbusWriteBitsB(thisDev.Addr.Write.OutputBits, 1000, s15);
break;
case 190:
ModbusReadBits(thisDev.Addr.Read.InputBits, 1);
thisDev.ReceiveWindow = 0xFF; // Set receive window to maximum to test the limit
state = 900;
break;
default:
writeDbg(MbError, "I did not expect state %d in timer timr!", state);