2014-05-12 10:46:53 +02:00
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/*@!Encoding:1252*/
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includes
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{
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2014-05-15 14:56:23 +02:00
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#include "include\ModbusUdpClientCommon.cin"
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2014-05-15 18:40:08 +02:00
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#include "include\ModbusFunctions.cin"
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2014-05-12 10:46:53 +02:00
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}
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variables
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{
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2014-05-15 14:43:52 +02:00
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char gNodeName[10] = "ClientUDP";
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msTimer muster, clock;
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2014-05-12 10:46:53 +02:00
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byte gX[2] = {1, 0};
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2014-05-15 14:43:52 +02:00
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2014-05-15 18:40:08 +02:00
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enum MbClientState {INIT, ConfWago1, ConfWago2, ConfWago3, ConfWago4, ConfWago5, ConfWago6, DATA};
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2014-05-15 14:43:52 +02:00
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enum MbClientState gState = INIT;
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2014-05-12 10:46:53 +02:00
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}
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// Get information of local network interface such like ip address
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on preStart
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{
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writeClear(0);
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2014-05-15 14:43:52 +02:00
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setStartdelay(10);
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2014-05-12 10:46:53 +02:00
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}
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on start
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{
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2014-05-15 18:40:08 +02:00
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char ip[16];
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sysGetVariableString("%BUS_TYPE%%CHANNEL%::%NODE_NAME%::Config", "IP", ip, elCount(ip));
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ModbusInit(ip, @sysvar::Config::Modbus::Port);
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2014-05-15 14:43:52 +02:00
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// Read serial code, additional stuff is done in OnModbusReceiveRegisters
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gState = ConfWago1;
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ModbusReadRegisters(0x2011, 1);
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2014-05-12 10:46:53 +02:00
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}
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// Modbus events ----------------------------------------------------------------------
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void OnModbusReadBitsFailed(enum ModbusRequestError error, enum ModbusException ex, struct ModbusApHeader mbap)
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{
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}
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void OnModbusReadRegistersFailed(enum ModbusRequestError error, enum ModbusException ex, struct ModbusApHeader mbap)
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{
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}
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void OnModbusWriteBitFailed(enum ModbusRequestError error, enum ModbusException ex, struct ModbusApHeader mbap)
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{
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}
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void OnModbusWriteRegisterFailed(enum ModbusRequestError error, enum ModbusException ex, struct ModbusApHeader mbap)
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{
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}
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void OnModbusWriteBitsFailed(enum ModbusRequestError error, enum ModbusException ex, struct ModbusApHeader mbap)
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{
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}
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void OnModbusWriteRegistersFailed(enum ModbusRequestError error, enum ModbusException ex, struct ModbusApHeader mbap)
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{
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}
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2014-05-15 14:43:52 +02:00
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void OnModbusWriteMasksFailed(enum ModbusRequestError error, enum ModbusException ex, struct ModbusApHeader mbap)
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{
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}
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void OnModbusReadWriteRegistersFailed(enum ModbusRequestError error, enum ModbusException ex, struct ModbusApHeader mbap)
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{
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}
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2014-05-12 10:46:53 +02:00
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2014-05-15 14:43:52 +02:00
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void OnModbusReadBitsSuccess(struct ModbusResReceiveBits mbr, byte bitStatus[], word numBits)
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2014-05-12 10:46:53 +02:00
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{
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2014-05-15 14:43:52 +02:00
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char str[20*2];
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hbin_to_strhex(mbr.Data, str);
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2014-05-15 17:05:20 +02:00
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writeLineEx(0, 1, "<%NODE_NAME%> OnModbusReceiveBits: Received %d bits (in %d bytes): %s", numBits, mbr.ByteCount, str);
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2014-05-12 10:46:53 +02:00
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}
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2014-05-15 14:43:52 +02:00
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void OnModbusReadRegistersSuccess(struct ModbusResReceiveRegisters mbr, word numRegs)
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2014-05-12 10:46:53 +02:00
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{
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2014-05-15 14:43:52 +02:00
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char str[20*5];
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long fehler;
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2014-05-15 18:40:08 +02:00
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byte i;
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2014-05-15 14:43:52 +02:00
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switch (gState)
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{
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case ConfWago1:
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2014-05-15 18:40:08 +02:00
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@sysvar::%BUS_TYPE%%CHANNEL%::%NODE_NAME%::Info::SerialCode = mbr.Data[0];
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2014-05-15 14:43:52 +02:00
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gState = ConfWago2;
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ModbusReadRegisters(0x2012, 1);
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break;
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case ConfWago2:
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2014-05-15 18:40:08 +02:00
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@sysvar::%BUS_TYPE%%CHANNEL%::%NODE_NAME%::Info::DeviceCode = mbr.Data[0];
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2014-05-15 14:43:52 +02:00
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gState = ConfWago3;
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2014-05-15 18:40:08 +02:00
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ModbusReadRegisters(0x2030, 65);
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2014-05-15 14:43:52 +02:00
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break;
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case ConfWago3:
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2014-05-15 18:40:08 +02:00
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for (i = 0; i < 65; i++)
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{
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if (mbr.Data[i] == 0x0000)
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{
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gState = DATA;
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return;
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}
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ParseDeviceCode(mbr.Data[i]);
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}
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gState = ConfWago4;
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ModbusReadRegisters(0x2031, 64);
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break;
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case ConfWago4:
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for (i = 0; i < 64; i++)
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{
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if (mbr.Data[i] == 0x0000)
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{
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gState = DATA;
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return;
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}
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ParseDeviceCode(mbr.Data[i]);
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}
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gState = ConfWago5;
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ModbusReadRegisters(0x2032, 64);
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break;
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case ConfWago5:
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for (i = 0; i < 64; i++)
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{
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if (mbr.Data[i] == 0x0000)
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{
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gState = DATA;
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return;
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}
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ParseDeviceCode(mbr.Data[i]);
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}
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gState = ConfWago5;
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ModbusReadRegisters(0x2033, 64);
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break;
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case ConfWago6:
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for (i = 0; i < 64; i++)
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{
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if (mbr.Data[i] == 0x0000)
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{
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gState = DATA;
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return;
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}
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ParseDeviceCode(mbr.Data[i]);
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}
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gState = DATA;
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2014-05-15 14:43:52 +02:00
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break;
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default:
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2014-05-15 18:40:08 +02:00
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// Do everything else here
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dbin_to_strhex(mbr.Data, str);
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writeLineEx(0, 1, "<%NODE_NAME%> OnModbusReceiveRegisters: Received %d bytes: %s", mbr.ByteCount, str);
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2014-05-15 14:43:52 +02:00
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break;
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}
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2014-05-12 10:46:53 +02:00
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}
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2014-05-15 14:43:52 +02:00
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void OnModbusWriteBitSuccess(struct ModbusResConfirmSingle mbc)
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2014-05-12 10:46:53 +02:00
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{
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2014-05-15 17:05:20 +02:00
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writeLineEx(0, 1, "<%NODE_NAME%> OnModbusConfirmBit: Set bit 0x%X to %d", mbc.Address, (mbc.Value > 0 ? 1 : 0));
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2014-05-12 10:46:53 +02:00
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}
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2014-05-15 14:43:52 +02:00
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void OnModbusWriteRegisterSuccess(struct ModbusResConfirmSingle mbc)
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2014-05-12 10:46:53 +02:00
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{
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2014-05-15 17:05:20 +02:00
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writeLineEx(0, 1, "<%NODE_NAME%> OnModbusConfirmRegister: Set register 0x%X to %d", mbc.Address, mbc.Value);
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2014-05-12 10:46:53 +02:00
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}
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2014-05-15 14:43:52 +02:00
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void OnModbusWriteBitsSuccess(struct ModbusResConfirmMultiple mbc)
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2014-05-12 10:46:53 +02:00
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{
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2014-05-15 17:05:20 +02:00
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writeLineEx(0, 1, "<%NODE_NAME%> OnModbusConfirmBits: Set %d bits beginning with 0x%X", mbc.Count, mbc.Address);
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2014-05-12 10:46:53 +02:00
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}
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2014-05-15 14:43:52 +02:00
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void OnModbusWriteRegistersSuccess(struct ModbusResConfirmMultiple mbc)
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{
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2014-05-15 17:05:20 +02:00
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writeLineEx(0, 1, "<%NODE_NAME%> OnModbusConfirmRegisters: Set %d registers beginning with 0x%X", mbc.Count, mbc.Address);
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2014-05-15 14:43:52 +02:00
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}
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void OnModbusWriteMasksSuccess(struct ModbusResConfirmMasks mbc)
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2014-05-12 10:46:53 +02:00
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{
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}
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// Key events -------------------------------------------------------------------------
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2014-05-15 14:43:52 +02:00
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on key 'i' // read the configuration
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{
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}
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on key 'r' // read the first bits
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2014-05-12 10:46:53 +02:00
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{
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2014-05-15 14:43:52 +02:00
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ModbusReadBits(0, 51);
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}
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on key 'R' // read constant registers
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{
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ModbusReadRegisters(0x2000, 8);
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2014-05-12 10:46:53 +02:00
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}
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2014-05-15 14:43:52 +02:00
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on key 'a' // set left bar
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2014-05-12 10:46:53 +02:00
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{
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byte x[16] = {1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0};
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ModbusWriteBitsB(0, 16, x);
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}
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2014-05-15 14:43:52 +02:00
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on key 'A' // read the output bits
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{
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ModbusReadBits(0x200, 16);
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}
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2014-05-12 10:46:53 +02:00
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2014-05-15 14:43:52 +02:00
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on key 's' // set right bar
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2014-05-12 10:46:53 +02:00
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{
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byte x[16] = {0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1};
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ModbusWriteBitsB(0, 16, x);
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}
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2014-05-15 14:43:52 +02:00
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on key 'e' // write register
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{
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ModbusWriteRegister(0, 0x5555);
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}
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on key 'E' // read register
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{
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ModbusWriteRegister(0, 0);
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}
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on key 'Y' // write bit on
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2014-05-12 10:46:53 +02:00
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{
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ModbusWriteBit(0, 0);
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}
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2014-05-15 14:43:52 +02:00
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on key 'y' // write bit off
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2014-05-12 10:46:53 +02:00
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{
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ModbusWriteBit(0, 1);
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}
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on key 'X'
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{
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ModbusWriteBit(1, 0);
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}
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on key 'x'
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{
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ModbusWriteBit(1, 1);
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}
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on key 'C'
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{
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ModbusWriteBit(2, 0);
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}
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on key 'c'
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{
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ModbusWriteBit(2, 1);
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}
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on key 'V'
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{
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ModbusWriteBit(3, 0);
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}
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on key 'v'
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{
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ModbusWriteBit(3, 1);
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}
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2014-05-15 14:43:52 +02:00
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on key '+' // set all bits on
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2014-05-12 10:46:53 +02:00
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{
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byte x[2] = {0xFF, 0xFF};
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ModbusWriteBits(0, 16, x);
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}
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2014-05-15 14:43:52 +02:00
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on key '-' // set all bits off
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2014-05-12 10:46:53 +02:00
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{
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byte x[2] = {0x00, 0x00};
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ModbusWriteBits(0, 16, x);
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}
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2014-05-15 14:43:52 +02:00
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on key 'z' // start timer muster
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2014-05-12 10:46:53 +02:00
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{
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setTimerCyclic(muster, 100);
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}
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2014-05-15 14:43:52 +02:00
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on key 'Z' // stop timer muster
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2014-05-12 10:46:53 +02:00
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{
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cancelTimer(muster);
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}
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on timer muster
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{
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if (gX[0] != 0)
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{
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if (gX[0] == 0x80)
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{
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gX[0] = 0x00;
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gX[1] = 0x01;
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}
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else
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gX[0] <<= 1;
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}
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else
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{
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if (gX[1] == 0x80)
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{
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gX[0] = 0x01;
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gX[1] = 0x00;
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}
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else
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gX[1] <<= 1;
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}
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ModbusWriteBits(0, 16, gX);
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//ModbusReadBits(0, 512);
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}
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2014-05-15 14:43:52 +02:00
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on key 't' // show clock on output
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{
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setTimerCyclic(clock, 1000);
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}
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on key 'T' // show clock on output
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{
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clock.Cancel();
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}
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on timer clock
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{
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byte s, x[2];
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s = (timeNow() / 100000) % 30;
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x[0] = (s & 0x01) | (s & 0x02) | ((s & 0x04) << 1) | ((s & 0x08) << 4);
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x[1] = (s & 0x10) << 3;
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ModbusWriteBits(0, 16, x);
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}
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